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Negative values in R0 data frame during the pedestal calculation #91
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I don't understand what is the original content of those cells. Do they have baselines inconsistent with those obtained from DRS4 calibration? In any case, we should absolutely avoid that a negative value becomes a large one. Set it to zero instead. |
Sorry, let me clarify: Concerning the previous post, pedestal data (r3889) was taken without baseline correction. Then, we saw extremely high ADC counts(~65550) in R0 data with EVB baseline correction based on this pedestal table, which made three pixels outliers in the calibration script. After EVB's baseline correction, those capacitors had negative value due to high pedestal and also converted to extremely high values already at the EVB stage. I produced the pedestal table with the previous version of lstchain, and this table should work in EVB. So, this is not an urgent issue, but we should fix it to produce a pedestal table for EVB in the future. |
Ok, thanks for the clarification! In any case, let's implement a fix straightaway, to avoid that a negative value becomes a large positive one. Can you take care of it @SeiyaNozaki ? |
Let me take care:) |
It seems a few capacitors (2-3cell/(4096cel * 1855pix * 2gain)) have too small pedestal values (<50ADC).
For those capacitors, R0 data would be possibly negative during the pedestal calculation with time-lapse correction enabled.
(It is possible that raw data of those capacitors have already zero...)
The data type of R0 is uint16, so those negative values are converted to too high ADC counts, which will be saved in a pedestal table...
I'd like to avoid such a situation... possible solutions are:
Do you have any opinions?
Related redmine ticket is:
https://forge.in2p3.fr/issues/44184
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