Implement the WaveActiveBitAnd HLSL Function

[farzonl]

• Implement WaveActiveBitAnd clang builtin,
• Link WaveActiveBitAnd clang builtin with hlsl_intrinsics.h
• Add sema checks for WaveActiveBitAnd to CheckHLSLBuiltinFunctionCall in SemaChecking.cpp
• Add codegen for WaveActiveBitAnd to EmitHLSLBuiltinExpr in CGBuiltin.cpp
• Add codegen tests to clang/test/CodeGenHLSL/builtins/WaveActiveBitAnd.hlsl
• Add sema tests to clang/test/SemaHLSL/BuiltIns/WaveActiveBitAnd-errors.hlsl
• Create the int_dx_WaveActiveBitAnd intrinsic in IntrinsicsDirectX.td
• Create the DXILOpMapping of int_dx_WaveActiveBitAnd to 120 in DXIL.td
• Create the WaveActiveBitAnd.ll and WaveActiveBitAnd_errors.ll tests in llvm/test/CodeGen/DirectX/
• Create the int_spv_WaveActiveBitAnd intrinsic in IntrinsicsSPIRV.td
• In SPIRVInstructionSelector.cpp create the WaveActiveBitAnd lowering and map it to int_spv_WaveActiveBitAnd in SPIRVInstructionSelector::selectIntrinsic.
• Create SPIR-V backend test case in llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveBitAnd.ll

DirectX

DXIL Opcode	DXIL OpName	Shader Model	Shader Stages
120	WaveActiveBit	6.0	('library', 'compute', 'amplification', 'mesh', 'pixel', 'vertex', 'hull', 'domain', 'geometry', 'raygeneration', 'intersection', 'anyhit', 'closesthit', 'miss', 'callable', 'node')

SPIR-V

OpGroupNonUniformBitwiseAnd:

Description:

A bitwise and group operation of all Value
operands contributed by active invocations in the
group.

Result Type must be a scalar or vector of integer
type.

Execution is a Scope that identifies the group of
invocations affected by this command. It must be Subgroup.

The identity I for Operation is ~0. If Operation is
ClusteredReduce, ClusterSize must be present.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a
scalar of integer type, whose Signedness operand is 0.
ClusterSize must come from a constant
instruction. Behavior is undefined unless
ClusterSize is at least 1 and a power of 2. If ClusterSize is
greater than the size of the group, executing this instruction
results in undefined behavior.

Capability:
GroupNonUniformArithmetic, GroupNonUniformClustered,
GroupNonUniformPartitionedNV

Missing before version 1.3.

Word Count	Opcode	Results	Operands
6 + variable	359	<id> Result Type	Result <id>	Scope <id> Execution	Group Operation Operation	<id> Value	Optional <id> ClusterSize

Test Case(s)

Example 1

//dxc WaveActiveBitAnd_test.hlsl -T lib_6_8 -enable-16bit-types -O0

export uint4 fn(uint4 p1) {
    return WaveActiveBitAnd(p1);
}

HLSL:

Returns the bitwise AND of all the values of the expression across all active lanes in the current wave and replicates it back to all active lanes.

Syntax

<int_type> WaveActiveBitAnd(
   <int_type> expr
);

Parameters

expr

The expression to evaluate.

Return value

The bitwise AND value.

Remarks

This function is supported from shader model 6.0 in all shader stages.

 

See also

Overview of Shader Model 6

Shader Model 6