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Chips supporting AVX512_FP16 have been released for more than a year. Why does Intel's open source GPU computing sub-computing library still not support AVX512_FP16? AVX512_FP16 is the instruction I expect to use
The text was updated successfully, but these errors were encountered:
oneDNN uses instructions from AVX512_FP16 ISA extension on processors with Intel AVX 10.1/512 instruction set support (4th and 5th generation Intel Xeon Scalable Processors and Intel Xeon 6 processors).
Default numerical behavior for oneDNN functions requires fp32 accumulation, which is not supported by FMA instructions in AVX512_FP16 extension. This implementation can be added in relaxedaccumulation mode, but it's not a priority for the core engineering team at the moment.
Chips supporting AVX512_FP16 have been released for more than a year. Why does Intel's open source GPU computing sub-computing library still not support AVX512_FP16? AVX512_FP16 is the instruction I expect to use
The text was updated successfully, but these errors were encountered: