You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Auto merge of rust-lang#73756 - Manishearth:rollup-aehswb2, r=Manishearth
Rollup of 13 pull requests
Successful merges:
- rust-lang#72620 (Omit DW_AT_linkage_name when it is the same as DW_AT_name)
- rust-lang#72967 (Don't move cursor in search box when using arrows to navigate results)
- rust-lang#73102 (proc_macro: Stop flattening groups with dummy spans)
- rust-lang#73297 (Support configurable deny-warnings for all in-tree crates.)
- rust-lang#73507 (Cleanup MinGW LLVM linkage workaround)
- rust-lang#73588 (Fix handling of reserved registers for ARM inline asm)
- rust-lang#73597 (Record span of `const` kw in GenericParamKind)
- rust-lang#73629 (Make AssocOp Copy)
- rust-lang#73681 (Update Chalk to 0.14)
- rust-lang#73707 (Fix links in `SliceIndex` documentation)
- rust-lang#73719 (emitter: column width defaults to 140)
- rust-lang#73729 (disable collectionbenches for android)
- rust-lang#73748 (Add code block to code in documentation of `List::rebase_onto`)
Failed merges:
r? @ghost
Copy file name to clipboardexpand all lines: src/doc/unstable-book/src/library-features/asm.md
+6-2
Original file line number
Diff line number
Diff line change
@@ -474,7 +474,7 @@ Here is the list of currently supported register classes:
474
474
| AArch64 |`reg`|`x[0-28]`, `x30`|`r`|
475
475
| AArch64 |`vreg`|`v[0-31]`|`w`|
476
476
| AArch64 |`vreg_low16`|`v[0-15]`|`x`|
477
-
| ARM |`reg`|`r[0-r10]`, `r12`, `r14`|`r`|
477
+
| ARM |`reg`|`r[0-5]``r7`\*, `r[8-10]`, `r11`\*, `r12`, `r14`|`r`|
478
478
| ARM (Thumb) |`reg_thumb`|`r[0-r7]`|`l`|
479
479
| ARM (ARM) |`reg_thumb`|`r[0-r10]`, `r12`, `r14`|`l`|
480
480
| ARM |`sreg`|`s[0-31]`|`t`|
@@ -497,6 +497,8 @@ Here is the list of currently supported register classes:
497
497
> Note #2: On x86-64 the high byte registers (e.g. `ah`) are only available when used as an explicit register. Specifying the `reg_byte` register class for an operand will always allocate a low byte register.
498
498
>
499
499
> Note #3: NVPTX doesn't have a fixed register set, so named registers are not supported.
500
+
>
501
+
> Note #4: On ARM the frame pointer is either `r7` or `r11` depending on the platform.
500
502
501
503
Additional register classes may be added in the future based on demand (e.g. MMX, x87, etc).
502
504
@@ -591,7 +593,9 @@ Some registers cannot be used for input or output operands:
591
593
| Architecture | Unsupported register | Reason |
592
594
| ------------ | -------------------- | ------ |
593
595
| All |`sp`| The stack pointer must be restored to its original value at the end of an asm code block. |
594
-
| All |`bp` (x86), `r11` (ARM), `x29` (AArch64), `x8` (RISC-V), `fr` (Hexagon) | The frame pointer cannot be used as an input or output. |
596
+
| All |`bp` (x86), `x29` (AArch64), `x8` (RISC-V), `fr` (Hexagon) | The frame pointer cannot be used as an input or output. |
597
+
| ARM |`r7` or `r11`| On ARM the frame pointer can be either `r7` or `r11` depending on the target. The frame pointer cannot be used as an input or output. |
598
+
| ARM |`r6`|`r6` is used internally by LLVM as a base pointer and therefore cannot be used as an input or output. |
595
599
| x86 |`k0`| This is a constant zero register which can't be modified. |
596
600
| x86 |`ip`| This is the program counter, not a real register. |
597
601
| x86 |`mm[0-7]`| MMX registers are not currently supported (but may be in the future). |
0 commit comments