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Support #[repr(simd)] types in input/output of PowerPC inline assembly
1 parent fc3dc84 commit 313e9f2

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6 files changed

+179
-15
lines changed

6 files changed

+179
-15
lines changed

‎compiler/rustc_codegen_gcc/src/asm.rs

+6-4
Original file line numberDiff line numberDiff line change
@@ -653,9 +653,9 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
653653
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => "r",
654654
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
655655
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
656+
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vreg) => "v",
656657
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
657-
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer)
658-
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vreg) => {
658+
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
659659
unreachable!("clobber-only")
660660
}
661661
InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
@@ -729,9 +729,11 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
729729
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => cx.type_i32(),
730730
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => cx.type_i32(),
731731
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => cx.type_f64(),
732+
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vreg) => {
733+
cx.type_vector(cx.type_i64(), 2)
734+
}
732735
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
733-
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer)
734-
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vreg) => {
736+
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
735737
unreachable!("clobber-only")
736738
}
737739
InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => cx.type_i32(),

‎compiler/rustc_codegen_llvm/src/asm.rs

+4-6
Original file line numberDiff line numberDiff line change
@@ -679,9 +679,8 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) ->
679679
PowerPC(PowerPCInlineAsmRegClass::reg) => "r",
680680
PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
681681
PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
682-
PowerPC(PowerPCInlineAsmRegClass::cr)
683-
| PowerPC(PowerPCInlineAsmRegClass::xer)
684-
| PowerPC(PowerPCInlineAsmRegClass::vreg) => {
682+
PowerPC(PowerPCInlineAsmRegClass::vreg) => "v",
683+
PowerPC(PowerPCInlineAsmRegClass::cr) | PowerPC(PowerPCInlineAsmRegClass::xer) => {
685684
unreachable!("clobber-only")
686685
}
687686
RiscV(RiscVInlineAsmRegClass::reg) => "r",
@@ -843,9 +842,8 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
843842
PowerPC(PowerPCInlineAsmRegClass::reg) => cx.type_i32(),
844843
PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => cx.type_i32(),
845844
PowerPC(PowerPCInlineAsmRegClass::freg) => cx.type_f64(),
846-
PowerPC(PowerPCInlineAsmRegClass::cr)
847-
| PowerPC(PowerPCInlineAsmRegClass::xer)
848-
| PowerPC(PowerPCInlineAsmRegClass::vreg) => {
845+
PowerPC(PowerPCInlineAsmRegClass::vreg) => cx.type_vector(cx.type_i64(), 2),
846+
PowerPC(PowerPCInlineAsmRegClass::cr) | PowerPC(PowerPCInlineAsmRegClass::xer) => {
849847
unreachable!("clobber-only")
850848
}
851849
RiscV(RiscVInlineAsmRegClass::reg) => cx.type_i32(),

‎compiler/rustc_span/src/symbol.rs

+2
Original file line numberDiff line numberDiff line change
@@ -399,6 +399,7 @@ symbols! {
399399
allow_fail,
400400
allow_internal_unsafe,
401401
allow_internal_unstable,
402+
altivec,
402403
alu32,
403404
always,
404405
and,
@@ -2136,6 +2137,7 @@ symbols! {
21362137
volatile_store,
21372138
vreg,
21382139
vreg_low16,
2140+
vsx,
21392141
vtable_align,
21402142
vtable_size,
21412143
warn,

‎compiler/rustc_target/src/asm/powerpc.rs

+7-1
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,13 @@ impl PowerPCInlineAsmRegClass {
4949
}
5050
}
5151
Self::freg => types! { _: F32, F64; },
52-
Self::vreg => &[],
52+
Self::vreg => {
53+
// FIXME: vsx also supports integers and floats
54+
types! {
55+
altivec: VecI8(16), VecI16(8), VecI32(4), VecF32(4);
56+
vsx: VecI64(2), VecF64(2);
57+
}
58+
}
5359
Self::cr | Self::xer => &[],
5460
}
5561
}

‎src/doc/unstable-book/src/language-features/asm-experimental-arch.md

+4-2
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
3434
| PowerPC | `reg` | `r0`, `r[3-12]`, `r[14-28]` | `r` |
3535
| PowerPC | `reg_nonzero` | `r[3-12]`, `r[14-28]` | `b` |
3636
| PowerPC | `freg` | `f[0-31]` | `f` |
37-
| PowerPC | `vreg` | `v[0-31]` | Only clobbers |
37+
| PowerPC | `vreg` | `v[0-31]` | `v` |
3838
| PowerPC | `cr` | `cr[0-7]`, `cr` | Only clobbers |
3939
| PowerPC | `xer` | `xer` | Only clobbers |
4040
| wasm32 | `local` | None\* | `r` |
@@ -80,7 +80,8 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
8080
| PowerPC | `reg` | None | `i8`, `i16`, `i32` |
8181
| PowerPC | `reg_nonzero` | None | `i8`, `i16`, `i32` |
8282
| PowerPC | `freg` | None | `f32`, `f64` |
83-
| PowerPC | `vreg` | N/A | Only clobbers |
83+
| PowerPC | `vreg` | `altivec` | `vector_bool_char`, `vector_bool_short`, `vector_bool_int`, `vector_signed_char`, `vector_signed_short`, `vector_signed_int`, `vector_unsigned_char`, `vector_unsigned_short`, `vector_unsigned_int`, `vector_float` |
84+
| PowerPC | `vreg` | `vsx` | `vector_bool_long`, `vector_signed_long`, `vector_unsigned_long`, `vector_double` |
8485
| PowerPC | `cr` | N/A | Only clobbers |
8586
| PowerPC | `xer` | N/A | Only clobbers |
8687
| wasm32 | `local` | None | `i8` `i16` `i32` `i64` `f32` `f64` |
@@ -193,6 +194,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
193194
| PowerPC | `reg` | None | `0` | None |
194195
| PowerPC | `reg_nonzero` | None | `3` | None |
195196
| PowerPC | `freg` | None | `0` | None |
197+
| PowerPC | `vreg` | None | `0` | None |
196198
| s390x | `reg` | None | `%r0` | None |
197199
| s390x | `reg_addr` | None | `%r1` | None |
198200
| s390x | `freg` | None | `%f0` | None |

‎tests/assembly/asm/powerpc-types.rs

+156-2
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,15 @@
1-
//@ revisions: powerpc powerpc64
1+
//@ revisions: powerpc powerpc_altivec powerpc_vsx powerpc64 powerpc64_vsx
22
//@ assembly-output: emit-asm
33
//@[powerpc] compile-flags: --target powerpc-unknown-linux-gnu
44
//@[powerpc] needs-llvm-components: powerpc
5-
//@[powerpc64] compile-flags: --target powerpc64-unknown-linux-gnu
5+
//@[powerpc_altivec] compile-flags: --target powerpc-unknown-linux-gnu -C target-feature=+altivec --cfg altivec
6+
//@[powerpc_altivec] needs-llvm-components: powerpc
7+
//@[powerpc_vsx] compile-flags: --target powerpc-unknown-linux-gnu -C target-feature=+altivec,+vsx --cfg altivec --cfg vsx
8+
//@[powerpc_vsx] needs-llvm-components: powerpc
9+
//@[powerpc64] compile-flags: --target powerpc64-unknown-linux-gnu --cfg altivec
610
//@[powerpc64] needs-llvm-components: powerpc
11+
//@[powerpc64_vsx] compile-flags: --target powerpc64-unknown-linux-gnu -C target-feature=+vsx --cfg altivec --cfg vsx
12+
//@[powerpc64_vsx] needs-llvm-components: powerpc
713
//@ compile-flags: -Zmerge-functions=disabled
814

915
#![feature(no_core, lang_items, rustc_attrs, repr_simd, asm_experimental_arch)]
@@ -29,8 +35,23 @@ trait Sized {}
2935
#[lang = "copy"]
3036
trait Copy {}
3137

38+
impl<T: Copy, const N: usize> Copy for [T; N] {}
39+
3240
type ptr = *const i32;
3341

42+
#[repr(simd)]
43+
pub struct i8x16([i8; 16]);
44+
#[repr(simd)]
45+
pub struct i16x8([i16; 8]);
46+
#[repr(simd)]
47+
pub struct i32x4([i32; 4]);
48+
#[repr(simd)]
49+
pub struct i64x2([i64; 2]);
50+
#[repr(simd)]
51+
pub struct f32x4([f32; 4]);
52+
#[repr(simd)]
53+
pub struct f64x2([f64; 2]);
54+
3455
impl Copy for i8 {}
3556
impl Copy for u8 {}
3657
impl Copy for i16 {}
@@ -39,6 +60,13 @@ impl Copy for i64 {}
3960
impl Copy for f32 {}
4061
impl Copy for f64 {}
4162
impl Copy for ptr {}
63+
impl Copy for i8x16 {}
64+
impl Copy for i16x8 {}
65+
impl Copy for i32x4 {}
66+
impl Copy for i64x2 {}
67+
impl Copy for f32x4 {}
68+
impl Copy for f64x2 {}
69+
4270
extern "C" {
4371
fn extern_func();
4472
static extern_static: u8;
@@ -124,6 +152,48 @@ check!(reg_f32, f32, freg, "fmr");
124152
// CHECK: #NO_APP
125153
check!(reg_f64, f64, freg, "fmr");
126154

155+
// altivec-LABEL: vreg_i8x16:
156+
// altivec: #APP
157+
// altivec: vmr {{[0-9]+}}, {{[0-9]+}}
158+
// altivec: #NO_APP
159+
#[cfg(altivec)]
160+
check!(vreg_i8x16, i8x16, vreg, "vmr");
161+
162+
// altivec-LABEL: vreg_i16x8:
163+
// altivec: #APP
164+
// altivec: vmr {{[0-9]+}}, {{[0-9]+}}
165+
// altivec: #NO_APP
166+
#[cfg(altivec)]
167+
check!(vreg_i16x8, i16x8, vreg, "vmr");
168+
169+
// altivec-LABEL: vreg_i32x4:
170+
// altivec: #APP
171+
// altivec: vmr {{[0-9]+}}, {{[0-9]+}}
172+
// altivec: #NO_APP
173+
#[cfg(altivec)]
174+
check!(vreg_i32x4, i32x4, vreg, "vmr");
175+
176+
// vsx-LABEL: vreg_i64x2:
177+
// vsx: #APP
178+
// vsx: vmr {{[0-9]+}}, {{[0-9]+}}
179+
// vsx: #NO_APP
180+
#[cfg(vsx)]
181+
check!(vreg_i64x2, i64x2, vreg, "vmr");
182+
183+
// altivec-LABEL: vreg_f32x4:
184+
// altivec: #APP
185+
// altivec: vmr {{[0-9]+}}, {{[0-9]+}}
186+
// altivec: #NO_APP
187+
#[cfg(altivec)]
188+
check!(vreg_f32x4, f32x4, vreg, "vmr");
189+
190+
// vsx-LABEL: vreg_f64x2:
191+
// vsx: #APP
192+
// vsx: vmr {{[0-9]+}}, {{[0-9]+}}
193+
// vsx: #NO_APP
194+
#[cfg(vsx)]
195+
check!(vreg_f64x2, f64x2, vreg, "vmr");
196+
127197
// CHECK-LABEL: reg_i8_r0:
128198
// CHECK: #APP
129199
// CHECK: mr 0, 0
@@ -197,3 +267,87 @@ check_reg!(reg_f32_f18, f32, "18", "f18", "fmr");
197267
// CHECK: fmr 18, 18
198268
// CHECK: #NO_APP
199269
check_reg!(reg_f64_f18, f64, "18", "f18", "fmr");
270+
271+
// altivec-LABEL: vreg_i8x16_v0:
272+
// altivec: #APP
273+
// altivec: vmr 0, 0
274+
// altivec: #NO_APP
275+
#[cfg(altivec)]
276+
check_reg!(vreg_i8x16_v0, i8x16, "0", "v0", "vmr");
277+
278+
// altivec-LABEL: vreg_i16x8_v0:
279+
// altivec: #APP
280+
// altivec: vmr 0, 0
281+
// altivec: #NO_APP
282+
#[cfg(altivec)]
283+
check_reg!(vreg_i16x8_v0, i16x8, "0", "v0", "vmr");
284+
285+
// altivec-LABEL: vreg_i32x4_v0:
286+
// altivec: #APP
287+
// altivec: vmr 0, 0
288+
// altivec: #NO_APP
289+
#[cfg(altivec)]
290+
check_reg!(vreg_i32x4_v0, i32x4, "0", "v0", "vmr");
291+
292+
// vsx-LABEL: vreg_i64x2_v0:
293+
// vsx: #APP
294+
// vsx: vmr 0, 0
295+
// vsx: #NO_APP
296+
#[cfg(vsx)]
297+
check_reg!(vreg_i64x2_v0, i64x2, "0", "v0", "vmr");
298+
299+
// altivec-LABEL: vreg_f32x4_v0:
300+
// altivec: #APP
301+
// altivec: vmr 0, 0
302+
// altivec: #NO_APP
303+
#[cfg(altivec)]
304+
check_reg!(vreg_f32x4_v0, f32x4, "0", "v0", "vmr");
305+
306+
// vsx-LABEL: vreg_f64x2_v0:
307+
// vsx: #APP
308+
// vsx: vmr 0, 0
309+
// vsx: #NO_APP
310+
#[cfg(vsx)]
311+
check_reg!(vreg_f64x2_v0, f64x2, "0", "v0", "vmr");
312+
313+
// altivec-LABEL: vreg_i8x16_v18:
314+
// altivec: #APP
315+
// altivec: vmr 18, 18
316+
// altivec: #NO_APP
317+
#[cfg(altivec)]
318+
check_reg!(vreg_i8x16_v18, i8x16, "18", "v18", "vmr");
319+
320+
// altivec-LABEL: vreg_i16x8_v18:
321+
// altivec: #APP
322+
// altivec: vmr 18, 18
323+
// altivec: #NO_APP
324+
#[cfg(altivec)]
325+
check_reg!(vreg_i16x8_v18, i16x8, "18", "v18", "vmr");
326+
327+
// altivec-LABEL: vreg_i32x4_v18:
328+
// altivec: #APP
329+
// altivec: vmr 18, 18
330+
// altivec: #NO_APP
331+
#[cfg(altivec)]
332+
check_reg!(vreg_i32x4_v18, i32x4, "18", "v18", "vmr");
333+
334+
// vsx-LABEL: vreg_i64x2_v18:
335+
// vsx: #APP
336+
// vsx: vmr 18, 18
337+
// vsx: #NO_APP
338+
#[cfg(vsx)]
339+
check_reg!(vreg_i64x2_v18, i64x2, "18", "v18", "vmr");
340+
341+
// altivec-LABEL: vreg_f32x4_v18:
342+
// altivec: #APP
343+
// altivec: vmr 18, 18
344+
// altivec: #NO_APP
345+
#[cfg(altivec)]
346+
check_reg!(vreg_f32x4_v18, f32x4, "18", "v18", "vmr");
347+
348+
// vsx-LABEL: vreg_f64x2_v18:
349+
// vsx: #APP
350+
// vsx: vmr 18, 18
351+
// vsx: #NO_APP
352+
#[cfg(vsx)]
353+
check_reg!(vreg_f64x2_v18, f64x2, "18", "v18", "vmr");

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