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Rollup merge of #99043 - compiler-errors:derive-nit, r=cjgillot
Collapse some weirdly-wrapping derives self-explanatory
2 parents d75a572 + 69ac8a6 commit 6497130

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-72
lines changed

2 files changed

+12
-72
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compiler/rustc_hir/src/hir.rs

+4-24
Original file line numberDiff line numberDiff line change
@@ -1438,18 +1438,8 @@ impl<'hir> Body<'hir> {
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}
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/// The type of source expression that caused this generator to be created.
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#[derive(
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Clone,
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PartialEq,
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PartialOrd,
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Eq,
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Hash,
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HashStable_Generic,
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Encodable,
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Decodable,
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Debug,
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Copy
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)]
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#[derive(Clone, PartialEq, PartialOrd, Eq, Hash, Debug, Copy)]
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#[derive(HashStable_Generic, Encodable, Decodable)]
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pub enum GeneratorKind {
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/// An explicit `async` block or the body of an async function.
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Async(AsyncGeneratorKind),
@@ -1481,18 +1471,8 @@ impl GeneratorKind {
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///
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/// This helps error messages but is also used to drive coercions in
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/// type-checking (see #60424).
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#[derive(
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Clone,
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PartialEq,
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PartialOrd,
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Eq,
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Hash,
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HashStable_Generic,
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Encodable,
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Decodable,
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Debug,
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Copy
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)]
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#[derive(Clone, PartialEq, PartialOrd, Eq, Hash, Debug, Copy)]
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#[derive(HashStable_Generic, Encodable, Decodable)]
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pub enum AsyncGeneratorKind {
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/// An explicit `async` block written by the user.
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Block,

compiler/rustc_target/src/asm/mod.rs

+8-48
Original file line numberDiff line numberDiff line change
@@ -244,18 +244,8 @@ impl FromStr for InlineAsmArch {
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}
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}
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#[derive(
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Copy,
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Clone,
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Encodable,
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Decodable,
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Debug,
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Eq,
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PartialEq,
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PartialOrd,
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Hash,
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HashStable_Generic
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)]
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#[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
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#[derive(HashStable_Generic, Encodable, Decodable)]
259249
pub enum InlineAsmReg {
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X86(X86InlineAsmReg),
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Arm(ArmInlineAsmReg),
@@ -406,18 +396,8 @@ impl InlineAsmReg {
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}
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}
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#[derive(
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Copy,
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Clone,
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Encodable,
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Decodable,
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Debug,
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Eq,
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PartialEq,
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PartialOrd,
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Hash,
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HashStable_Generic
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)]
399+
#[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
400+
#[derive(HashStable_Generic, Encodable, Decodable)]
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pub enum InlineAsmRegClass {
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X86(X86InlineAsmRegClass),
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Arm(ArmInlineAsmRegClass),
@@ -620,18 +600,8 @@ impl InlineAsmRegClass {
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}
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}
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#[derive(
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Copy,
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Clone,
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Encodable,
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Decodable,
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Debug,
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Eq,
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PartialEq,
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PartialOrd,
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Hash,
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HashStable_Generic
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)]
603+
#[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
604+
#[derive(HashStable_Generic, Encodable, Decodable)]
635605
pub enum InlineAsmRegOrRegClass {
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Reg(InlineAsmReg),
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RegClass(InlineAsmRegClass),
@@ -808,18 +778,8 @@ pub fn allocatable_registers(
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}
809779
}
810780

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#[derive(
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Copy,
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Clone,
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Encodable,
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Decodable,
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Debug,
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Eq,
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PartialEq,
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PartialOrd,
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Hash,
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HashStable_Generic
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)]
781+
#[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
782+
#[derive(HashStable_Generic, Encodable, Decodable)]
823783
pub enum InlineAsmClobberAbi {
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X86,
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X86_64Win,

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