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| 1 | +diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c |
| 2 | +index 34088d6..5356cc9 100644 |
| 3 | +--- a/drivers/net/phy/broadcom.c |
| 4 | ++++ b/drivers/net/phy/broadcom.c |
| 5 | +@@ -17,6 +17,7 @@ |
| 6 | + #include <linux/module.h> |
| 7 | + #include <linux/phy.h> |
| 8 | + #include <linux/brcmphy.h> |
| 9 | ++#include <linux/delay.h> |
| 10 | + |
| 11 | + |
| 12 | + #define BRCM_PHY_MODEL(phydev) \ |
| 13 | +@@ -75,6 +76,8 @@ |
| 14 | + /* |
| 15 | + * EXPANSION SHADOW ACCESS REGISTERS. (PHY REG 0x15, 0x16, and 0x17) |
| 16 | + */ |
| 17 | ++#define MII_BCM54XX_CR 0x00 /* BCM54xx control register */ |
| 18 | ++#define MII_BCM54XX_CR_RESET 0x8000 /* Reset */ |
| 19 | + #define MII_BCM54XX_EXP_AADJ1CH0 0x001f |
| 20 | + #define MII_BCM54XX_EXP_AADJ1CH0_SWP_ABCD_OEN 0x0200 |
| 21 | + #define MII_BCM54XX_EXP_AADJ1CH0_SWSEL_THPF 0x0100 |
| 22 | +@@ -91,6 +94,13 @@ |
| 23 | + #define MII_BCM54XX_EXP_EXP97 0x0f97 |
| 24 | + #define MII_BCM54XX_EXP_EXP97_MYST 0x0c0c |
| 25 | + |
| 26 | ++#define MII_BCM54XX_AUX_CTL 0x18 /* Auxiliary control */ |
| 27 | ++#define MII_BCM54XX_AUX_CTL_ENCODE(val) (((val & 0x7) << 12)|(val & 0x7)) |
| 28 | ++ |
| 29 | ++#define MII_BCM54XX_AUX_STATUS 0x19 /* Auxiliary status */ |
| 30 | ++#define MII_BCM54XX_AUX_STATUS_LINKMODE_MASK 0x0700 |
| 31 | ++#define MII_BCM54XX_AUX_STATUS_LINKMODE_SHIFT 8 |
| 32 | ++ |
| 33 | + /* |
| 34 | + * BCM5482: Secondary SerDes registers |
| 35 | + */ |
| 36 | +@@ -115,6 +125,10 @@ |
| 37 | + #define MII_BRCM_FET_BRCMTEST 0x1f /* Brcm test register */ |
| 38 | + #define MII_BRCM_FET_BT_SRE 0x0080 /* Shadow register enable */ |
| 39 | + |
| 40 | ++#define MII_BCM54XX_SHD_WR_ENCODE(val, data) \ |
| 41 | ++ (MII_BCM54XX_SHD_WRITE | MII_BCM54XX_SHD_VAL(val) | \ |
| 42 | ++ MII_BCM54XX_SHD_DATA(data)) |
| 43 | ++ |
| 44 | + |
| 45 | + /*** Shadow register definitions ***/ |
| 46 | + |
| 47 | +@@ -366,6 +380,31 @@ static int bcm54xx_config_init(struct phy_device *phydev) |
| 48 | + return 0; |
| 49 | + } |
| 50 | + |
| 51 | ++static int bcm54616_config_init(struct phy_device *phydev) |
| 52 | ++{ |
| 53 | ++ int reg; |
| 54 | ++ |
| 55 | ++ /* reset the PHY */ |
| 56 | ++ reg = phy_read(phydev, MII_BCM54XX_CR); |
| 57 | ++ reg |= MII_BCM54XX_CR_RESET; |
| 58 | ++ phy_write(phydev, MII_BCM54XX_CR, reg); |
| 59 | ++ |
| 60 | ++ /* Setup read from auxilary control shadow register 7 */ |
| 61 | ++ phy_write(phydev, MII_BCM54XX_AUX_CTL, |
| 62 | ++ MII_BCM54XX_AUX_CTL_ENCODE(7)); |
| 63 | ++ /* Read Misc Control register */ |
| 64 | ++ reg = (phy_read(phydev, MII_BCM54XX_AUX_CTL) & 0x8FFF) | 0x8010; |
| 65 | ++ phy_write(phydev, MII_BCM54XX_AUX_CTL, reg); |
| 66 | ++ |
| 67 | ++ /* Enable copper/fiber auto-detect */ |
| 68 | ++ phy_write(phydev, MII_BCM54XX_SHD, |
| 69 | ++ MII_BCM54XX_SHD_WR_ENCODE(0x1e, 0x027)); |
| 70 | ++ |
| 71 | ++ genphy_config_aneg(phydev); |
| 72 | ++ |
| 73 | ++ return 0; |
| 74 | ++} |
| 75 | ++ |
| 76 | + static int bcm5482_config_init(struct phy_device *phydev) |
| 77 | + { |
| 78 | + int err, reg; |
| 79 | +@@ -456,6 +495,125 @@ static int bcm5482_read_status(struct phy_device *phydev) |
| 80 | + return err; |
| 81 | + } |
| 82 | + |
| 83 | ++/* |
| 84 | ++ * Find out if PHY is in copper or serdes mode by looking at Shadow Reg |
| 85 | ++ * 0x1F - "Mode Control Register" |
| 86 | ++ */ |
| 87 | ++static int bcm54616_is_serdes(struct phy_device *phydev) |
| 88 | ++{ |
| 89 | ++ u16 val; |
| 90 | ++ |
| 91 | ++ phy_write(phydev, MII_BCM54XX_SHD, |
| 92 | ++ MII_BCM54XX_SHD_VAL(0x1F)); |
| 93 | ++ val = phy_read(phydev, MII_BCM54XX_SHD); |
| 94 | ++ return (val & 0x0001); |
| 95 | ++} |
| 96 | ++ |
| 97 | ++/* |
| 98 | ++ * Determine SerDes link speed and duplex from Expansion reg 0x42 "Operating |
| 99 | ++ * Mode Status Register" |
| 100 | ++ */ |
| 101 | ++static u32 bcm54616_parse_serdes_sr(struct phy_device *phydev) |
| 102 | ++{ |
| 103 | ++ u16 val; |
| 104 | ++ int i = 0; |
| 105 | ++ |
| 106 | ++ /* Wait 1s for link - Clause 37 autonegotiation happens very fast */ |
| 107 | ++ while (1) { |
| 108 | ++ phy_write(phydev, MII_BCM54XX_SHD, |
| 109 | ++ MII_BCM54XX_SHD_VAL(0x15)); |
| 110 | ++ val = phy_read(phydev, MII_BCM54XX_SHD); |
| 111 | ++ |
| 112 | ++ if (val & 0x0200) |
| 113 | ++ break; |
| 114 | ++ |
| 115 | ++ if (i++ > 1000) { |
| 116 | ++ phydev->link = 0; |
| 117 | ++ return 1; |
| 118 | ++ } |
| 119 | ++ |
| 120 | ++ udelay(1000); /* 1 ms */ |
| 121 | ++ } |
| 122 | ++ |
| 123 | ++ phydev->link = 1; |
| 124 | ++ switch ((val >> 6) & 0x3) { |
| 125 | ++ case (0x00): |
| 126 | ++ phydev->speed = 10; |
| 127 | ++ break; |
| 128 | ++ case (0x01): |
| 129 | ++ phydev->speed = 100; |
| 130 | ++ break; |
| 131 | ++ case (0x02): |
| 132 | ++ phydev->speed = 1000; |
| 133 | ++ break; |
| 134 | ++ } |
| 135 | ++ |
| 136 | ++ phydev->duplex = (val & 0x0100) == 0x0100; |
| 137 | ++ |
| 138 | ++ return 0; |
| 139 | ++} |
| 140 | ++ |
| 141 | ++static int bcm54xx_parse_status(struct phy_device *phydev) |
| 142 | ++{ |
| 143 | ++ unsigned int mii_reg; |
| 144 | ++ |
| 145 | ++ mii_reg = phy_read(phydev, MII_BCM54XX_AUX_STATUS); |
| 146 | ++ |
| 147 | ++ switch ((mii_reg & MII_BCM54XX_AUX_STATUS_LINKMODE_MASK) >> |
| 148 | ++ MII_BCM54XX_AUX_STATUS_LINKMODE_SHIFT) { |
| 149 | ++ case 1: |
| 150 | ++ phydev->duplex = DUPLEX_HALF; |
| 151 | ++ phydev->speed = SPEED_10; |
| 152 | ++ break; |
| 153 | ++ case 2: |
| 154 | ++ phydev->duplex = DUPLEX_FULL; |
| 155 | ++ phydev->speed = SPEED_10; |
| 156 | ++ break; |
| 157 | ++ case 3: |
| 158 | ++ phydev->duplex = DUPLEX_HALF; |
| 159 | ++ phydev->speed = SPEED_100; |
| 160 | ++ break; |
| 161 | ++ case 5: |
| 162 | ++ phydev->duplex = DUPLEX_FULL; |
| 163 | ++ phydev->speed = SPEED_100; |
| 164 | ++ break; |
| 165 | ++ case 6: |
| 166 | ++ phydev->duplex = DUPLEX_HALF; |
| 167 | ++ phydev->speed = SPEED_1000; |
| 168 | ++ break; |
| 169 | ++ case 7: |
| 170 | ++ phydev->duplex = DUPLEX_FULL; |
| 171 | ++ phydev->speed = SPEED_1000; |
| 172 | ++ break; |
| 173 | ++ default: |
| 174 | ++ printk("Auto-neg error, defaulting to 1000/HD\n"); |
| 175 | ++ phydev->duplex = DUPLEX_FULL; |
| 176 | ++ phydev->speed = SPEED_1000; |
| 177 | ++ break; |
| 178 | ++ } |
| 179 | ++ |
| 180 | ++ return 0; |
| 181 | ++} |
| 182 | ++ |
| 183 | ++/* |
| 184 | ++ * Figure out if BCM54616 is in serdes or copper mode and determine link |
| 185 | ++ * configuration accordingly |
| 186 | ++ */ |
| 187 | ++static int bcm54616_read_status(struct phy_device *phydev) |
| 188 | ++{ |
| 189 | ++ if (bcm54616_is_serdes(phydev)) { |
| 190 | ++ bcm54616_parse_serdes_sr(phydev); |
| 191 | ++ /* phydev->port = PORT_FIBRE; */ |
| 192 | ++ } else { |
| 193 | ++ /* Wait for auto-negotiation to complete or fail */ |
| 194 | ++ genphy_update_link(phydev); |
| 195 | ++ /* Parse BCM54xx copper aux status register */ |
| 196 | ++ bcm54xx_parse_status(phydev); |
| 197 | ++ } |
| 198 | ++ |
| 199 | ++ return 0; |
| 200 | ++} |
| 201 | ++ |
| 202 | + static int bcm54xx_ack_interrupt(struct phy_device *phydev) |
| 203 | + { |
| 204 | + int reg; |
| 205 | +@@ -468,6 +626,18 @@ static int bcm54xx_ack_interrupt(struct phy_device *phydev) |
| 206 | + return 0; |
| 207 | + } |
| 208 | + |
| 209 | ++static int bcm54616_ack_interrupt(struct phy_device *phydev) |
| 210 | ++{ |
| 211 | ++ int reg; |
| 212 | ++ |
| 213 | ++ /* Clear pending interrupts. */ |
| 214 | ++ reg = phy_read(phydev, MII_BCM54XX_ISR); |
| 215 | ++ if (reg < 0) |
| 216 | ++ return reg; |
| 217 | ++ |
| 218 | ++ return 0; |
| 219 | ++} |
| 220 | ++ |
| 221 | + static int bcm54xx_config_intr(struct phy_device *phydev) |
| 222 | + { |
| 223 | + int reg, err; |
| 224 | +@@ -485,6 +655,23 @@ static int bcm54xx_config_intr(struct phy_device *phydev) |
| 225 | + return err; |
| 226 | + } |
| 227 | + |
| 228 | ++static int bcm54616_config_intr(struct phy_device *phydev) |
| 229 | ++{ |
| 230 | ++ int reg, err; |
| 231 | ++ |
| 232 | ++ reg = phy_read(phydev, MII_BCM54XX_ECR); |
| 233 | ++ if (reg < 0) |
| 234 | ++ return reg; |
| 235 | ++ |
| 236 | ++ if (phydev->interrupts == PHY_INTERRUPT_ENABLED) |
| 237 | ++ reg &= ~MII_BCM54XX_ECR_IM; |
| 238 | ++ else |
| 239 | ++ reg |= MII_BCM54XX_ECR_IM; |
| 240 | ++ |
| 241 | ++ err = phy_write(phydev, MII_BCM54XX_ECR, reg); |
| 242 | ++ return err; |
| 243 | ++} |
| 244 | ++ |
| 245 | + static int bcm5481_config_aneg(struct phy_device *phydev) |
| 246 | + { |
| 247 | + int ret; |
| 248 | +@@ -671,6 +858,19 @@ static struct phy_driver broadcom_drivers[] = { |
| 249 | + .config_intr = bcm54xx_config_intr, |
| 250 | + .driver = { .owner = THIS_MODULE }, |
| 251 | + }, { |
| 252 | ++ .phy_id = PHY_ID_BCM54616, |
| 253 | ++ .phy_id_mask = 0xfffffff0, |
| 254 | ++ .name = "Broadcom BCM54616", |
| 255 | ++ .features = PHY_GBIT_FEATURES | |
| 256 | ++ SUPPORTED_Pause | SUPPORTED_Asym_Pause, |
| 257 | ++ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
| 258 | ++ .config_init = bcm54616_config_init, |
| 259 | ++ .config_aneg = genphy_config_aneg, |
| 260 | ++ .read_status = bcm54616_read_status, |
| 261 | ++ .ack_interrupt = bcm54616_ack_interrupt, |
| 262 | ++ .config_intr = bcm54616_config_intr, |
| 263 | ++ .driver = { .owner = THIS_MODULE }, |
| 264 | ++}, { |
| 265 | + .phy_id = PHY_ID_BCM5464, |
| 266 | + .phy_id_mask = 0xfffffff0, |
| 267 | + .name = "Broadcom BCM5464", |
| 268 | +@@ -795,6 +995,7 @@ static struct mdio_device_id __maybe_unused broadcom_tbl[] = { |
| 269 | + { PHY_ID_BCM5411, 0xfffffff0 }, |
| 270 | + { PHY_ID_BCM5421, 0xfffffff0 }, |
| 271 | + { PHY_ID_BCM5461, 0xfffffff0 }, |
| 272 | ++ { PHY_ID_BCM54616, 0xfffffff0 }, |
| 273 | + { PHY_ID_BCM5464, 0xfffffff0 }, |
| 274 | + { PHY_ID_BCM5482, 0xfffffff0 }, |
| 275 | + { PHY_ID_BCM5482, 0xfffffff0 }, |
| 276 | +diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h |
| 277 | +index 6f76277..63b1d5e 100644 |
| 278 | +--- a/include/linux/brcmphy.h |
| 279 | ++++ b/include/linux/brcmphy.h |
| 280 | +@@ -11,6 +11,7 @@ |
| 281 | + #define PHY_ID_BCM5421 0x002060e0 |
| 282 | + #define PHY_ID_BCM5464 0x002060b0 |
| 283 | + #define PHY_ID_BCM5461 0x002060c0 |
| 284 | ++#define PHY_ID_BCM54616 0x03625d10 |
| 285 | + #define PHY_ID_BCM57780 0x03625d90 |
| 286 | + |
| 287 | + #define PHY_ID_BCM7366 0x600d8490 |
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