[LoongArch64] fix the errors when reverse GT_JCC.

[shushanhf]

This PR is part of the issue #69705 to amend the LA's port.

Fix the errors when reverse GT_JCC.

For LoongArch64, the floating compare result is saved to the specific register, where there are 8 bits for saveing at most eight different results, that is the FCC0 ~ FCC7.

fcmp.cond   cc, $f1, $f2                 ----->update the float comparing result FCC-x by cc.

And there are two condition branch instructions bcnez and bceqz which based on the floating comparing results to jump.

This is very different with the AArch64 and AMD64.

/// For  AArch64 and AMD64:                                    /// For  LoongArch64
cmp  $f1, $f2                                                   fcmp.cond      <----the condition is here.
branch.condition   <---the condition is here.                  branch true or false.

So, the struct GenTreeCC is not so fit for LoongArch64 and RISC-V.

[ghost]

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
See info in area-owners.md if you want to be subscribed.

Issue Details

---

This PR is part of the issue #69705 to amend the LA's port.

Fix the errors when reverse GT_JCC.

Author:	shushanhf
Assignees:	-
Labels:	area-CodeGen-coreclr, community-contribution
Milestone:	-

[shushanhf]

Hi, @jakobbotsch
Could you please review this PR?
How to amend the struct GenTreeCC for LoongArch64 and RISC-V?