-
Notifications
You must be signed in to change notification settings - Fork 264
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Remove most PSRAM features #2178
Remove most PSRAM features #2178
Conversation
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Really nice to make this runtime configurable!
Do you think we could write some basic tests? It might depend on what's currently on the runners but I'm sure we can swap out some bits if we need to.
f28878a
to
161c546
Compare
|
fde90d5
to
3fe55f6
Compare
03a10f7
to
f1d0a51
Compare
Let's rebase this on @bugadani's lock changes, after that this looks good to go! |
f9977a4
to
06f8606
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Just a doc fixup and LGTM, thanks! I'm really glad we're nuking all those feature flags :D.
Co-authored-by: Scott Mabin <[email protected]>
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
LGTM, thanks for doing this!
|
||
let guessed_size = unsafe { | ||
let ptr = (EXTMEM_ORIGIN + 4 * 1024 * 1024 - 36 * 1024) as *mut u8; | ||
for i in 0..(36 * 1024) { |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Why 36K? Please explain the choice, and can we do away with scanning these blocks fully?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Idea is to write and read more than fits the cache
Ideally we get reading the chip id to work - that would be the best solution
Thank you for your contribution!
We appreciate the time and effort you've put into this pull request.
To help us review it efficiently, please ensure you've gone through the following checklist:
Submission Checklist 📝
cargo xtask fmt-packages
command to ensure that all changed code is formatted correctly.CHANGELOG.md
in the proper section.Extra:
Pull Request Details 📖
Description
This gets rid of most of the PSRAM related features. We still need
psram
andoctal-psram
howeverThis also adds auto-detection of PSRAM size (by using the RAM chip id on S2/S3, just probing memory on ESP32 since reading the chip id didn't work as expected)
The user now needs to pass a configuration parameter to psram_initialize - this way they could avoid RAM size auto-detect and configure things like the PSRAM SPI frequency
Testing
Examples still work