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Co-authored-by: Siddharth <[email protected]>
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hargoniX and bollu authored Oct 7, 2024
1 parent 64fdac3 commit 77bd117
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2 changes: 1 addition & 1 deletion src/Std/Tactic/BVDecide/Bitblast/BVExpr/Basic.lean
Original file line number Diff line number Diff line change
Expand Up @@ -78,7 +78,7 @@ def toString : BVBinOp → String
| xor => "^"
| add => "+"
| mul => "*"
| udiv => "u/"
| udiv => "/ᵤ"

instance : ToString BVBinOp := ⟨toString⟩

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Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ import Std.Sat.AIG.If

/-!
This module contains the implementation of a bitblaster for `BitVec.udiv`. The implemented
circuit is a ripple carry adder.
circuit is a shift subtractor.
-/

namespace Std.Tactic.BVDecide
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