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feat: BitVec.signExtend_eq_append_extractLsb' #7454

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merged 5 commits into from
Mar 12, 2025

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@bollu bollu commented Mar 12, 2025

This PR implements the bitwuzla rule BV_SIGN_EXTEND_ELIM, which rewrites a signExtend x as an append of the appropriate sign bits, followed by the bits of x.

@bollu bollu requested a review from kim-em as a code owner March 12, 2025 10:45
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bollu commented Mar 12, 2025

changelog-library

@github-actions github-actions bot added the changelog-library Library label Mar 12, 2025
@github-actions github-actions bot added the toolchain-available A toolchain is available for this PR, at leanprover/lean4-pr-releases:pr-release-NNNN label Mar 12, 2025
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Mathlib CI status (docs):

  • ❗ Batteries/Mathlib CI will not be attempted unless your PR branches off the nightly-with-mathlib branch. Try git rebase eb58f46ce7b41a9b6b273bb2dae2dc11abd78246 --onto 8fc8e8ed19ef218022f5a94cbf5e472e3b777e44. You can force Mathlib CI using the force-mathlib-ci label. (2025-03-12 11:16:07)

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alexkeizer commented Mar 12, 2025

LGTM!

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Just pushed a commit with my last suggestion, once again, the PR LGTM

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bollu commented Mar 12, 2025

Note that the symmetric version with v ≤ w is available as

theorem signExtend_eq_setWidth_of_lt (x : BitVec w) {v : Nat} (hv : v ≤ w) :
  x.signExtend v = x.setWidth v := signExtend_eq_setWidth_of_le x hv

@hargoniX hargoniX added this pull request to the merge queue Mar 12, 2025
Merged via the queue into leanprover:master with commit 8850f9e Mar 12, 2025
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5 participants