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@@ -13,6 +13,7 @@ mk { | |
inherit (localCrates) | ||
sel4 | ||
sel4-root-task | ||
sel4-supervising | ||
; | ||
}; | ||
} |
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@@ -16,6 +16,7 @@ mk { | |
sel4-elf-header | ||
sel4-stack | ||
sel4-initialize-tls | ||
sel4-supervising | ||
; | ||
}; | ||
} |
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# | ||
# Copyright 2024, Colias Group, LLC | ||
# | ||
# SPDX-License-Identifier: BSD-2-Clause | ||
# | ||
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{ mk, versions, localCrates }: | ||
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mk { | ||
package.name = "sel4-supervising"; | ||
dependencies = { | ||
inherit (versions) zerocopy; | ||
inherit (localCrates) sel4; | ||
}; | ||
} |
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@@ -0,0 +1,21 @@ | ||
# | ||
# Copyright 2023, Colias Group, LLC | ||
# | ||
# SPDX-License-Identifier: BSD-2-Clause | ||
# | ||
# | ||
# This file is generated from './Cargo.nix'. You can edit this file directly | ||
# if you are not using this project's Cargo manifest management tools. | ||
# See 'hacking/cargo-manifest-management/README.md' for more information. | ||
# | ||
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[package] | ||
name = "sel4-supervising" | ||
version = "0.1.0" | ||
authors = ["Nick Spinale <[email protected]>"] | ||
edition = "2021" | ||
license = "BSD-2-Clause" | ||
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[dependencies] | ||
sel4 = { path = "../sel4" } | ||
zerocopy = "0.7.32" |
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// | ||
// Copyright 2024, Colias Group, LLC | ||
// | ||
// SPDX-License-Identifier: BSD-2-Clause | ||
// | ||
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use sel4::VmFault; | ||
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use crate::{inner_decls, self_impl}; | ||
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self_impl!(VmFaultExt, VmFault); | ||
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pub trait VmFaultExt { | ||
inner_decls!(VmFault); | ||
} |
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// | ||
// Copyright 2024, Colias Group, LLC | ||
// | ||
// SPDX-License-Identifier: BSD-2-Clause | ||
// | ||
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use sel4::{UserContext, VCpuFault, VmFault, Word}; | ||
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use crate::{inner_decls, self_impl, BitField, VmFaultData, VmFaultWidth}; | ||
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#[allow(dead_code)] | ||
#[allow(non_upper_case_globals)] | ||
mod esr { | ||
use super::BitField; | ||
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pub(crate) const EC: BitField = BitField::from_range_inclusive(26..=31); | ||
pub(crate) const ISV: BitField = BitField::bit(24); | ||
pub(crate) const SAS: BitField = BitField::from_range_inclusive(22..=23); | ||
pub(crate) const SSE: BitField = BitField::bit(21); | ||
pub(crate) const SRT: BitField = BitField::from_range_inclusive(16..=20); | ||
pub(crate) const SF: BitField = BitField::bit(15); | ||
pub(crate) const WnR: BitField = BitField::bit(6); | ||
} | ||
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self_impl!(VmFaultExt, VmFault); | ||
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pub trait VmFaultExt { | ||
inner_decls!(VmFault); | ||
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fn esr_is_valid(&self) -> bool { | ||
esr::ISV.get(self.inner().fsr()) == 1 | ||
} | ||
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fn valid_esr(&self) -> Word { | ||
assert!(self.esr_is_valid()); | ||
self.inner().fsr() | ||
} | ||
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fn is_write(&self) -> bool { | ||
esr::WnR.get(self.valid_esr()) == 1 | ||
} | ||
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fn is_read(&self) -> bool { | ||
!self.is_write() | ||
} | ||
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fn width(&self) -> VmFaultWidth { | ||
match esr::SAS.get(self.valid_esr()) { | ||
0b00 => VmFaultWidth::U8, | ||
0b01 => VmFaultWidth::U16, | ||
0b10 => VmFaultWidth::U32, | ||
0b11 => VmFaultWidth::U64, | ||
_ => unreachable!(), | ||
} | ||
} | ||
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fn is_aligned(&self) -> bool { | ||
let mask = match self.width() { | ||
VmFaultWidth::U8 => 0x0, | ||
VmFaultWidth::U16 => 0x1, | ||
VmFaultWidth::U32 => 0x3, | ||
VmFaultWidth::U64 => 0x7, | ||
}; | ||
self.inner().addr() & mask == 0 | ||
} | ||
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fn data(&self, ctx: &UserContext) -> VmFaultData { | ||
assert!(self.is_write()); | ||
self.width().truncate(self.register_value(ctx)) | ||
} | ||
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fn emulate_read(&self, ctx: &mut UserContext, val: VmFaultData) { | ||
assert!(self.is_read()); | ||
assert_eq!(self.width(), val.width()); | ||
let reg = self.register_mut(ctx); | ||
*reg = val.set(*reg); | ||
} | ||
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fn register_value(&self, ctx: &UserContext) -> Word { | ||
match register_index(self.inner()) { | ||
0 => *ctx.x0(), | ||
1 => *ctx.x1(), | ||
2 => *ctx.x2(), | ||
3 => *ctx.x3(), | ||
4 => *ctx.x4(), | ||
5 => *ctx.x5(), | ||
6 => *ctx.x6(), | ||
7 => *ctx.x7(), | ||
8 => *ctx.x8(), | ||
9 => *ctx.x9(), | ||
10 => *ctx.x10(), | ||
11 => *ctx.x11(), | ||
12 => *ctx.x12(), | ||
13 => *ctx.x13(), | ||
14 => *ctx.x14(), | ||
15 => *ctx.x15(), | ||
16 => *ctx.x16(), | ||
17 => *ctx.x17(), | ||
18 => *ctx.x18(), | ||
19 => *ctx.x19(), | ||
20 => *ctx.x20(), | ||
21 => *ctx.x21(), | ||
22 => *ctx.x22(), | ||
23 => *ctx.x23(), | ||
24 => *ctx.x24(), | ||
25 => *ctx.x25(), | ||
26 => *ctx.x26(), | ||
27 => *ctx.x27(), | ||
28 => *ctx.x28(), | ||
29 => *ctx.x29(), | ||
30 => *ctx.x30(), | ||
31 => 0, | ||
_ => panic!(), | ||
} | ||
} | ||
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fn register_mut<'a>(&self, ctx: &'a mut UserContext) -> &'a mut Word { | ||
match register_index(self.inner()) { | ||
0 => ctx.x0_mut(), | ||
1 => ctx.x1_mut(), | ||
2 => ctx.x2_mut(), | ||
3 => ctx.x3_mut(), | ||
4 => ctx.x4_mut(), | ||
5 => ctx.x5_mut(), | ||
6 => ctx.x6_mut(), | ||
7 => ctx.x7_mut(), | ||
8 => ctx.x8_mut(), | ||
9 => ctx.x9_mut(), | ||
10 => ctx.x10_mut(), | ||
11 => ctx.x11_mut(), | ||
12 => ctx.x12_mut(), | ||
13 => ctx.x13_mut(), | ||
14 => ctx.x14_mut(), | ||
15 => ctx.x15_mut(), | ||
16 => ctx.x16_mut(), | ||
17 => ctx.x17_mut(), | ||
18 => ctx.x18_mut(), | ||
19 => ctx.x19_mut(), | ||
20 => ctx.x20_mut(), | ||
21 => ctx.x21_mut(), | ||
22 => ctx.x22_mut(), | ||
23 => ctx.x23_mut(), | ||
24 => ctx.x24_mut(), | ||
25 => ctx.x25_mut(), | ||
26 => ctx.x26_mut(), | ||
27 => ctx.x27_mut(), | ||
28 => ctx.x28_mut(), | ||
29 => ctx.x29_mut(), | ||
30 => ctx.x30_mut(), | ||
_ => panic!(), | ||
} | ||
} | ||
} | ||
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fn register_index(vm_fault: &VmFault) -> Word { | ||
esr::SRT.get(vm_fault.valid_esr()) | ||
} | ||
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self_impl!(VCpuFaultExt, VCpuFault); | ||
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pub trait VCpuFaultExt { | ||
inner_decls!(VCpuFault); | ||
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fn is_wfx(&self) -> bool { | ||
esr::EC.get(self.inner().hsr()) == 0b000001 | ||
} | ||
} |
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@@ -0,0 +1,34 @@ | ||
// | ||
// Copyright 2024, Colias Group, LLC | ||
// | ||
// SPDX-License-Identifier: BSD-2-Clause | ||
// | ||
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use sel4::config::sel4_cfg_if; | ||
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sel4_cfg_if! { | ||
if #[sel4_cfg(ARCH_AARCH64)] { | ||
#[path = "aarch64.rs"] | ||
mod imp; | ||
} else if #[sel4_cfg(ARCH_AARCH32)] { | ||
#[path = "aarch32.rs"] | ||
mod imp; | ||
} else if #[sel4_cfg(any(ARCH_RISCV64, ARCH_RISCV32))] { | ||
#[path = "riscv.rs"] | ||
mod imp; | ||
} else if #[sel4_cfg(ARCH_X86_64)] { | ||
#[path = "x86_64.rs"] | ||
mod imp; | ||
} | ||
} | ||
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#[cfg(any())] | ||
mod aarch32; | ||
#[cfg(any())] | ||
mod aarch64; | ||
#[cfg(any())] | ||
mod riscv; | ||
#[cfg(any())] | ||
mod x86_64; | ||
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pub use imp::*; |
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