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Fix for issues #365 and #361 on cv32e40s. #749

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silabs-oysteink
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When waking up from sleep (exiting FSM state SLEEP), the cause of wakeup is now flopped to enable the FSM to take the action according to the wakeup reason, although there may be higher priority events appearing after the wakeup.

Signed-off-by: Oystein Knauserud [email protected]

When waking up from sleep (exiting FSM state SLEEP), the cause of wakeup is now flopped to enable the FSM to take the action according to the wakeup reason, although there may be higher priority events appearing after the wakeup.

Signed-off-by: Oystein Knauserud <[email protected]>
@silabs-oysteink silabs-oysteink added the Component:RTL For issues in the RTL (e.g. for files in the rtl directory) label Jan 2, 2023
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Only some minor suggestions to make the added assertions look more similar

assert property (@(posedge clk) disable iff (!rst_n)
(ctrl_fsm_cs == SLEEP) &&
(ctrl_fsm_ns == FUNCTIONAL) &&
!(pending_nmi || irq_wu_ctrl_i || (wfe_in_wb && wu_wfe_i))
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Wouldn't it be logical to add && debug_req_i here?

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Agreed, adding it

(ctrl_fsm_cs == SLEEP) &&
(ctrl_fsm_ns == FUNCTIONAL) &&
!(pending_nmi || debug_req_i || (wfe_in_wb && wu_wfe_i)) &&
mstatus_i.mie
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&& irq_wu_ctrl_i seems more logical than the currently used && mstatus_i.mie

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Agree that it is logical to add the '&& irq_wu_ctrl_i'. mstatus.mie is still needed for this assertion as the core may wake up on a non-globally enabled interrupt. In that case no interrupt will be taken and the core continues ad PC+4.

assert property (@(posedge clk) disable iff (!rst_n)
(ctrl_fsm_cs == SLEEP) &&
(ctrl_fsm_ns == FUNCTIONAL) &&
!(debug_req_i || irq_wu_ctrl_i || (wfe_in_wb && wu_wfe_i))
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Add && pending_nmi

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Will add it

!(pending_nmi || debug_req_i || (wfe_in_wb && wu_wfe_i)) &&
mstatus_i.mie
|=>
(ctrl_fsm_o.irq_ack))
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Use pc_mux instead to make it similar to next assertion

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Changing to pc_mux comparisons.

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2 participants