Added trigger type 2 (mcontrol) #750
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Signed-off-by: Oystein Knauserud <[email protected]>
Signed-off-by: Oystein Knauserud <[email protected]>
silabs-oysteink
added
Component:RTL
Silabs-ArjanB
requested changes
Jan 3, 2023
rtl/cv32e40x_debug_triggers.sv
Outdated
| 2'b00, // sizelo : hardwired to zero, match any size | ||
| 4'b0001, // action : enter debug on match | ||
| 1'b0, // chain : hardwired to zero | ||
| mcontrol6_match_resolve(csr_wdata_i[MCONTROL2_6_MATCH_HIGH:MCONTROL2_6_MATCH_LOW]), // match, WARL(0,2,3) 10:7 |
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Also rename mcontrol6_match_resolve -> mcontrol2_6_match_resolve
rtl/cv32e40x_debug_triggers.sv
Outdated
| csr_wdata_i[6], // m : match in machine mode | ||
| 1'b0, // : hardwired to zero | ||
| 1'b0, // s : hardwired to zer0 | ||
| mcontrol6_u_resolve(csr_wdata_i[MCONTROL2_6_U]), // zero, U 3 |
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Also rename mcontrol6_u_resolve -> mcontrol2_6_u_resolve
rtl/cv32e40x_debug_triggers.sv
Outdated
| @@ -153,11 +174,11 @@ import cv32e40x_pkg::*; | |||
| 4'b0000, // zero, size (match any size) 19:16 | |||
| 4'b0001, // action, WARL(1), enter debug 15:12 | |||
| 1'b0, // zero, chain 11 | |||
| mcontrol6_match_resolve(csr_wdata_i[MCONTROL6_MATCH_HIGH:MCONTROL6_MATCH_LOW]), // match, WARL(0,2,3) 10:7 | |||
| mcontrol6_match_resolve(csr_wdata_i[MCONTROL2_6_MATCH_HIGH:MCONTROL2_6_MATCH_LOW]), // match, WARL(0,2,3) 10:7 | |||
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same here and other places
Signed-off-by: Oystein Knauserud <[email protected]>
Silabs-ArjanB
approved these changes
Jan 3, 2023
Silabs-ArjanB
requested changes
Jan 12, 2023
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The comment and behavior at line
cv32e40x/rtl/cv32e40x_debug_triggers.sv
Line 192 in 55d4a5b
…ype 0x5 when unsupported bits are set in tdata2. Defaulting to disabled trigger (type 0xF) instead of keeping tdata1 unchanged. Signed-off-by: Oystein Knauserud <[email protected]>
Silabs-ArjanB
approved these changes
Jan 17, 2023
Silabs-ArjanB
removed
the
Status:Do-not-merge
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Adding label do-not-merge as we may need an ISS update due to the changes in tdata1 legal values and reset value.