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I2C NACK error nesting #316
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Thanks for the pull request, and welcome! The Rust team is excited to review your changes, and you should hear from @ryankurte (or someone else) soon. Please see the contribution instructions for more information. |
Thanks for the PR! Do you have any examples of an implementation that can't distinguish address vs data NAKs? I understand they could exist but I couldn't find any, so I wonder if they do exist in practice. |
Based off of this comment most (if not all) HALs currently don't differentiate between NACKs on data vs. address. As a quick check, I looked at the STM32L0x3 reference manual and based on the possible interrupts it does not differentiate between NACKs on address and data. I suppose you could figure out where the NACK occurred based on if you had previously seen the address match interrupt. This sort of decoding might be possible in other HALs, and if I have time later I will dig through what I can find. Beyond that, where I work we have an internal device that does not differentiate between NACKs on address vs. data. Sadly, because it is an internal device I can't provide any documentation. I would also not disagree with anyone who says that that device is badly designed to give so little feedback. |
Thanks for the feedback! It's especially useful to hear about custom devices as that's of course exactly the sort of thing we can't find by searching around.
This is more or less what I'd expect - the device says it saw a "NAK", but to follow the I2C state machine you would know if it was in the address or data phase. For example in stm32f4xx-hal, a NACK here always means an address NACK (because we're waiting for the ADDR bit to be set, indicating the address has been sent and ACK'd), while a NACK in Does the implementation for your custom device not permit anything similar? Is the interface a combined address+data and you just get back a single transaction status, or do you send an address, get a result, send some data, get a result, etc? |
The device we have will indicate if a NACK has occurred in the transaction, but not where. This is true both for "raw" I2C reads and writes in addition to the defacto register read and write scheme that many devices implement. If we are reading data and we have received some of our requested data we can detect a data NACK in that case, but that is it. This is an older API that we are still trying to support so we can't easily add in differentiated NACKs. |
I'd like to make the case, that this might improve ergonomics besides the case, if
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A source enum was added to indicate if the NACK was from an address or a data byte. Some drivers may not be able to differentiate so they should use `Unknown`.
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LGTM
bors r+ |
This idea was first proposed here, but broken out to keep things moving.
This merges
ErrorKind::NoAcknowledgeData
andErrorKind::NoAcknowledgeAddress
into one variant with a source field to indicate what the NACK was in response to. Some drivers may not be able to differentiate between NACKs on address or data bytes so they should useNoAcknowledgeSource::Unknown
.Feel free to bikeshed names and documentation. I used the most obvious names to me, but naming is one of the hardest problems in programming.