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Collapse some weirdly-wrapping derives #99043

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Jul 9, 2022
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28 changes: 4 additions & 24 deletions compiler/rustc_hir/src/hir.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1438,18 +1438,8 @@ impl<'hir> Body<'hir> {
}

/// The type of source expression that caused this generator to be created.
#[derive(
Clone,
PartialEq,
PartialOrd,
Eq,
Hash,
HashStable_Generic,
Encodable,
Decodable,
Debug,
Copy
)]
#[derive(Clone, PartialEq, PartialOrd, Eq, Hash, Debug, Copy)]
#[derive(HashStable_Generic, Encodable, Decodable)]
pub enum GeneratorKind {
/// An explicit `async` block or the body of an async function.
Async(AsyncGeneratorKind),
Expand Down Expand Up @@ -1481,18 +1471,8 @@ impl GeneratorKind {
///
/// This helps error messages but is also used to drive coercions in
/// type-checking (see #60424).
#[derive(
Clone,
PartialEq,
PartialOrd,
Eq,
Hash,
HashStable_Generic,
Encodable,
Decodable,
Debug,
Copy
)]
#[derive(Clone, PartialEq, PartialOrd, Eq, Hash, Debug, Copy)]
#[derive(HashStable_Generic, Encodable, Decodable)]
pub enum AsyncGeneratorKind {
/// An explicit `async` block written by the user.
Block,
Expand Down
56 changes: 8 additions & 48 deletions compiler/rustc_target/src/asm/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -244,18 +244,8 @@ impl FromStr for InlineAsmArch {
}
}

#[derive(
Copy,
Clone,
Encodable,
Decodable,
Debug,
Eq,
PartialEq,
PartialOrd,
Hash,
HashStable_Generic
)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
#[derive(HashStable_Generic, Encodable, Decodable)]
pub enum InlineAsmReg {
X86(X86InlineAsmReg),
Arm(ArmInlineAsmReg),
Expand Down Expand Up @@ -406,18 +396,8 @@ impl InlineAsmReg {
}
}

#[derive(
Copy,
Clone,
Encodable,
Decodable,
Debug,
Eq,
PartialEq,
PartialOrd,
Hash,
HashStable_Generic
)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
#[derive(HashStable_Generic, Encodable, Decodable)]
pub enum InlineAsmRegClass {
X86(X86InlineAsmRegClass),
Arm(ArmInlineAsmRegClass),
Expand Down Expand Up @@ -620,18 +600,8 @@ impl InlineAsmRegClass {
}
}

#[derive(
Copy,
Clone,
Encodable,
Decodable,
Debug,
Eq,
PartialEq,
PartialOrd,
Hash,
HashStable_Generic
)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
#[derive(HashStable_Generic, Encodable, Decodable)]
pub enum InlineAsmRegOrRegClass {
Reg(InlineAsmReg),
RegClass(InlineAsmRegClass),
Expand Down Expand Up @@ -808,18 +778,8 @@ pub fn allocatable_registers(
}
}

#[derive(
Copy,
Clone,
Encodable,
Decodable,
Debug,
Eq,
PartialEq,
PartialOrd,
Hash,
HashStable_Generic
)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, PartialOrd, Hash)]
#[derive(HashStable_Generic, Encodable, Decodable)]
pub enum InlineAsmClobberAbi {
X86,
X86_64Win,
Expand Down